An array substrate of a display device is provided therein with Thin Film Transistors (TFTs), via which a display control is realized. After the array substrate is manufactured, a quality test on the TFTs should be performed in order to ensure a yield of the display device and facilitate a process control and a subsequent Failure Analysis (FA).
Regarding the test solution in related arts, a Test Element Group (TEG) is arranged on a non-display region of the array substrate. Similar as the TFT array in the display region, the TEG also includes a TFT array, but a connection end configured for test is connected to each of electrodes of each TFT. An operator may send test signals to or receives test signals from the TFT to be tested by enabling a probe on a test device to contact the connection end of the TFT to be tested. The operator can determine the TFT quality in the display region by testing the corresponding TFT in the TEG.
However, in a TEG structure in related arts, each of electrodes of a TFT corresponds to a connection end. When testing the whole TFT array, the operator has to control to move the probe all the time. Therefore, the above test method in related arts is inefficient and involves a large amount of work, and it is difficult for the operator to ensure an accurate positioning of the probe, or prevent from testing one TFT repeatedly.